xavierk/voculinux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases 3 Wiki Activity

Merge feature/20 into integration/spec16 (ticket #20: measured ladder thresholds)

Browse Source
This commit is contained in:
soubarnak
2026-11-06 09:37:13 +05:30
parent fbddbecd7a 987d8eec29
commit 6eb8ff3d67
2 changed files with 34 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/vocalinux/speech_recognition/model_ladder.py
+11 -12
View File
@@ -8,13 +8,12 @@ Rungs (quantized Turbo first, small floor last)::
large-v3-turbo-q8_0 -> large-v3-turbo-q5_0 -> small.en / small
Thresholds derive from the catalog on-disk sizes (874/574 MiB) plus the
512 MiB desktop headroom from the locked baseline protocol
(``scripts/measure_perf_baseline.py::recommend_thresholds``). Ticket #19
recorded no measured per-rung footprints, so these are size-plus-headroom
proxies: recalibrate them from hardware numbers when they land. The
derivation is pinned by ``tests/test_model_ladder.py`` so a catalog size
bump forces a threshold review.
Thresholds derive from ticket #19's measured transcribe peaks (1132 MiB
for q8_0, 846 MiB for q5_0) plus the 512 MiB desktop headroom from the
locked baseline protocol
(``scripts/measure_perf_baseline.py::recommend_thresholds``). The
derivation is pinned by ``tests/test_model_ladder.py`` so a re-measure
forces a threshold review.
Backend order follows the same readiness rule: CUDA ranks before Vulkan
only when a complete architecture-matching CUDA toolkit is installed
@@ -40,14 +39,14 @@ LADDER_RUNGS: tuple[str, ...] = (DEFAULT_RUNG, LOW_MEMORY_RUNG)
#: the baseline protocol adds to measured footprints.
HEADROOM_MIB: float = 512.0
#: Catalog on-disk sizes (MiB) the thresholds below are derived from.
_Q8_0_SIZE_MIB: float = 874.0
_Q5_0_SIZE_MIB: float = 574.0
#: Ticket #19 measured transcribe peaks (MiB) the thresholds below derive from.
_MEASURED_Q8_0_PEAK_MIB: float = 1132.0
_MEASURED_Q5_0_PEAK_MIB: float = 846.0
#: Free memory at or above this keeps the default q8_0 rung.
PREFER_Q8_0_ABOVE_MIB: float = _Q8_0_SIZE_MIB + HEADROOM_MIB
PREFER_Q8_0_ABOVE_MIB: float = _MEASURED_Q8_0_PEAK_MIB + HEADROOM_MIB
#: Free memory at or above this keeps the q5_0 rung; below it is the floor.
PREFER_Q5_0_ABOVE_MIB: float = _Q5_0_SIZE_MIB + HEADROOM_MIB
PREFER_Q5_0_ABOVE_MIB: float = _MEASURED_Q5_0_PEAK_MIB + HEADROOM_MIB
#: Minimum CUDA compute capability (major, minor) the bundled backend
#: targets. Older architectures cannot run its kernels.